Reconfigurable Digital Systems Research groups' current focus is towards :
- Research and Development of new applications (systems) that could be implemented on a single chip
- Enhancing the performance of such systems within a specific power budget.
We make use of Field Programmable Gate Arrays (FPGA) to research and develop diverse applications (systems) that could run on a single chip. In this scope we touch on the following:
- Application Specific IP
- Systems on a Chip (SoC)
- Network on a Chip (NoC)
- Processor Design
- High Speed Interfaces
In all the above cases, we are very conscious on power consumption and the RTL design takes this factor very seriously.
Since Digital Systems could relate to multiple disciplines, we work very closely with Communication Research Group and Machine Vision Research Group, particularly to see the potential of IP Core Development.
Reconfigurable Digital System Group organizes their 3rd “Hands on session on Digital Design with Verilog HDL and FPGA" targeting batch ’10 and batch ’11 students of Dept. of Electronic and Telecommunication Engineering. The session will be held on 14th September 2013 from 8.30AM to 3.00PM at the Digital and Analog Laboratories depending on the number of students register for the event.
Workshop content will be as follows.
- Verilog Coding Styles. (Coding conventions, common mistakes and best practices.)
- State Machine Design Techniques. (Different styles of designing Mealy and Moore state machines.)
- Speed, Power and Area aware designing. (Meeting application goals.)
- Designing for FPGAs. (Take the maximum out of FPGA resources.)
Those who are interested in attending the workshops please verify your presence providing your details to THIS DOCUMENT.
The hands on session on verilogHDL and FPGA which organized by the Reconfigurable Digital Systems Research Group was successfully held in the Analog and Digital electronic laboratories of the Department of Electronic and Telecommunication Engineering, University of Moratuwa. The goal of this session is to get undergraduate familiarize with the FPGA related technologies and to have hands on experience in getting started with digital design with verilogHDL.
Initially program was designed to accommodate 50-70 students in single laboratory, however due to the interest shown by the undergraduates; session was re-organized and conducted in two laboratories facilitating 120-130 students including semester two undergraduates to final year (level 4) undergraduates.
Hands on session on Digital Design with Verilog HDL and FPGA will be conducted by the Reconfigurable Digital System Research Group of University of Moratuwa for all undergraduates of the department of Electronic and Telecommunication Engineering. The workshop will be held on 12th February 2013 from 9.00am to 5.00pm at the department. Workshop is mainly targeted for the students from semester-2 and semester-4 who are new for the digital design concept; however any ENTC student who is interested can participate in the workshop.